1. Technical Field
The invention relates generally to semiconductor device fabrication, and more particularly, to recessing a material in a trench to a target depth.
2. Background Art
A common process in trench technology is filling a trench with a filling material and then recessing the filling material to a predetermined depth. For example, to form a buried plate of a trench capacitor, an arsenic-doped glass (ASG) layer is deposited on a trench sidewall and the trench is filled with resist. The resist is then recessed to a predetermined depth to expose the ASG in the upper trench. The exposed ASG is then selectively removed to the resist in the lower trench. The resist is then removed from the trench, leaving ASG only on the lower trench sidewall. Arsenic in the ASG is then driven into the silicon substrate in a subsequent thermal process to form the buried plate—a heavily doped region in the substrate.
One challenge in this process is precisely controlling the depth of the resist recess, which is critical to determining device characteristics such as trench capacitance and parasitic leakage current. One approach to this challenge includes a ‘send ahead’ technique in which a wafer from a lot is processed first and the recess depth is measured. The process for the rest of the wafers is then adjusted based on the measured depth from the ‘send ahead’ wafer. The ‘send ahead’ approach has a number of disadvantages. First, it is destructive because the resist recess of the send ahead wafer is traditionally measured by a scanning electron microscope (SEM), which requires the send ahead wafer to be cleaved (destroyed) for SEM analysis. This approach is prohibitively costly. Second, the ‘send ahead’ approach is time-consuming. When a lot gets to the recess process, a send ahead wafer has to be split from the lot and processed first and the process is adjusted based on the send ahead. The turn-around-time for this send ahead approach may take several hours. Third, the process delay between the send ahead and the lot adds process variation since a condition of the recess chamber from which the send ahead wafer is pulled may change when the lot is processed. Fourth, the send ahead approach is not compatible with the currently automated 300 mm process because it requires dedicated manpower to take the send ahead wafer out of the lot, deliver it to SEM lab, and analyze the recess depth after the SEM is completed. Finally, the send ahead approach cannot accommodate incoming wafer-to-wafer variations such as variations of trench profile and the filling characteristics. The possible chamber condition change aggravates this situation. All these variations cause the recess depth variation from wafer to wafer. With the send ahead approach, the process is adjusted only once and then all wafers are processed with the same process setup. Accordingly, process adjustment to accommodate the above variation on each wafer is impossible using the send ahead approach.
Therefore, a simple process with precise recess control but without send ahead is desired.